VIVEK BABTIWALE
Bachelor of Science in Electrical Engineering
California State Polytechnic University
Citizen of USA,
(Nine zero Nine)TwoSixThree-EightZeroZeroOne
dr_vek@yahoo.com
RELEVANT SKILLS
(29 years in the Electronics industry 1995 to 2024)
Microprocessors, Micro-controllers
Prusa3D Printer FDM printing,
Kelant S400 DLP UV Resin 3D Printing
3D Scanning using Bellus3D scanner.
CPLD programming
RAD hard links LVDS and RS232
RAM, ROM, EEPROM IF with uP
EMI Testing
Photoshop, Adobe Premiere, Protools Analog Multiplexer,
FPGA Design and simulation
Analog to Digital Converter Circuit Design
Thermal Vac Cable Design
ACTEL FPGA RAD Hard
EXPERIENCE
JPL-NASA Direct Hire
Pasadena, CA 01/30/2023 to 02/08/2024
Europa Clipper & Mars Sample Return Projects
Tested LVDS and FPGA based computer for spacecraft signal testing. Designed STM32 microprocessor based standalone computer for testing LVDS loopback board. Desiged and tested Rocket Thruster simulator using magnetics from Toroidal transformer and E-I Ciron core transformer. Documented and drew cabling schematics. Used Solidworks to design front panel cutouts and fastening hardware and 3D Printed prototypes. Tested power and signal isolation boards and troubleshot probems with RS-422 and Spacewire communication protocols. Designed built and tested cable harnesses with circular connectors cable and micro-d connectors. Qualified Ground Support equipment and integrated the equipment in Assembly, Test and Lauch Operations ( ATLO ). Used Altium Designer in a team to make large126 digital channel board layout. Used Visio to make block diagrams and cable drawings with twisted pair communication channels. Worked on Ground Support equipment functional block diagrams.
JPL Contractor ( Columbus Technologies / APR Consulting )
Pasadena, CA 01/30/23 -12/2021
Spacecraft and Ground Support System Integration for NASA ISRO Synthetic Aperture
Radar. Troubleshooting Differential driver RS422 noise issues from FPGA. Used National Instruments Pxie Chasis based test setup. Troubleshooting of Spacecraft circuitry through multiple cable harness using end circuit and isolation verification tests. Writing test
procedures using Break out Boxes, circular, uD, DB connector interface cables. Coordinating
RF Testing with mechanical team. Updating Cabling diagrams, and designing cabling on
Visio. Using optical to RS-232 interfaces. Designing Ethernet and 1553 Cables. Drawing Block Diagrams from test instructions for system interconnect diagrams.
B&A Engineering / JPL CATX Contractor
Costa Mesa, CA 11/22 – 04/21
Solidworks 3D Cad Thermal Simulations. Converted Cadence Schematic capture files to Altium Designer and exported to Solidworks to for thermal analysis. Used oscilloscope to capture RS422 and LVTTL Isolated ground circuit board in SLSC chassis for EGSE. Documented test procedure to test board. Using Visio to draw spacecraft and thermal vacuum testing configurations for JPL- International Space Station EMIT project. Writing IBATs for testing cable harnesses. Wrote drafts for Thermal Vacuum Testing including Quartz Crystal Measurements for contamination testing.
KELLY SERVICES / SUNRISE SYSTEMS SUBCONTRACTOR FOR
BIOSENSE WEBSTER, A COMPANY OF JOHNSON & JOHNSON
Irwindale, CA 04/21 – 04/15
Generated STL, .SLDPRT and SLDASM Solidworks files for 3D printing Prototypes. Analyzed G-Code and made modification to models for print optimization Worked with machinists to view Mastercam files and suggested modifications for part fabrication. Modified Solidworks drawings for aligning with CNC machine restrictions. On my own time, printed models using DLP Kelant S400 UV resin printer. Also on my own time, evaluated Elegoo DLP, and Form 2 Laser Resin printer. Printer prototypes on Prusa3D MK3 FMD 3D Printer. Designing test fixtures to validate catheters used for Atrial fibrillation and other heart disorders which go inside the human heart and fix atrial fibrillation. Integrating embedded C Programming code using Arduino based Atmel processor. Arduino nano, Arduino Mega 256, and Sainsmart touchscreen C coding is in progress for controlling SPI based relay board. Using RF ablation generator in test fixture for simulating resistive heating of heart tissue. Using LCR meter in test fixture for measuring impedance of catheter wires. Characterizing Thermocouples to understand temperature response in turbulent chamber. Using Orcad Schematic capture on existing board design to extract information for PCB fabrication and generating Gerber files, BOM, and parts list. Using Solidworks and running motion study of flow control disk valve. Wrote and executed Installation Qualification Protols ( IQ ). Wrote and executed Test Results ( TR ). Worked with the Quality Control department to write instructions using Good Documentation Practices ( GDP ).
ENGINEER, ATHENS CONSULTING, Pasadena 09/14 – 06/13
Fabricated mechanical components and brackets for heavy low temperature Infrared sensor. Modified window for temperature chamber seal from CAD drawing. Implemented laser subassembly from Solidworks Model. Implemented Kinematics model of platform using mechanical simulation tool SAM. Designed amplifier for infrared detectors, and used Labview to collect data for tangential flow vortex coal fired burner. Used infrared spectrometer, pyrometers, integrating sphere,and FLIR camera to characterize black body radiation. Ran batch file sequences from SDK sent out by vendors. Used oscilloscope, and data logger to record temperature versus time from testbed. Used LASERS to lock camera in infrared sensor focus. Designed test circuit to plot spectral intensity of UV diode using spectrometer. (Ranged from part time to full time per customer requirements)
PRODUCT ENGINEER, BabyARC, Pasadena 09/14 – 12/00
Developed a moving bassinet for newborns and infants. Used my personal 3D Printer to and Alibre Cad to design and 3D print self-reversing screw to generate reciprocating motion. Evaluated brushed DC motors with scotch yoke mechanism, crank and slider, 3 bar linkage, and Arduino mini, L298N H-bridge controlled Stepper motor to generate reciprocating ARC motion. Ran kinematics simulation software SAM to model reciprocation mechanism. Searched for manufacturers to source motors from AliBaba.com and did costing analysis to manufacturing quantities. Also ran crowd funding campaign and marketing campaign to pre-sell product. Also worked part time as an insurance agent.
PRODUCT ENGINEER, MACKENZIE LABS, Glendora 07/11 – 02/10
Designed product sheet metal enclosures using both Solidworks and AutoCAD. Checked parts and assemblies ( .sldprt and .sldasm ) for form fit and function. Manually performed bend radius calculations on older drawings. Made exploded views of assembly drawings. Transposed AutoCAD ( .dwg ) drawings to Solidworks ( .slddrw ). Generated scale .dxf drawings for LASER Cutter. Modified product inventory and website. Generated HTML files from Microsoft Powerpoint, and word. Wrote Test procedures for technicians. Precisely aligned Silkscreen if products with holes, slots notches and cut outs. Troubleshot boards and wrote test procedures.
ELECTRICAL ENGINEER, JPL-NASA, Pasadena 03/08 – 11/00
Designed cables for Thermal Vacuum testing of Space grade circuit boards. Modified Design of LVDS and RS-232 circuitry for Mars Science Lab project. Suggested Avionics requirements for Infrared instrument and suggested electronic architecture for Temperature Voltage and digital status Telemetry as well as Analog to Digital Converter, Digital Processor architecture and Power budget numbers. Simulated Electrical amplifier and level shifting circuits using SPICE tool included with DXP2004 Protel, currently Altium Designer. Designed PCB for testing LVDS signals for Spacecraft Interface and Science Data Processor Board. Wrote instructions for Technicians to assemble and test hardware. Worked with Focal Plane Array for Infrared imaging. Performed timing analysis through multiple paths and added buffer delays to satisfy set up and hold times of Xilinx Virtex II FPGA. Built testbench to collected data from ADC with logic analyzer. Wrote Sub-System requirements for Digital Acquisition circuitry of an Earth orbiting satellite. Wrote Electrical Interface Circuit Datasheet. Designed intermediate wiring harness to splice and branch off signals. Troubleshot VME back plane and resolved noise issues. Co-Designed Artificial Star / 100KW Plasma arc source to act as a thermal infrared black body radiation source. ( 8 to 12 microns.) Used Actel’s Libero Platinum Verilog HDL, with ModelSim and Synplicity software for modifying FPGA. Took existing design for FPGA and added multiple channel arbitration capability to grant various devices Direct Memory Access( DMA ) Matched timing of Synova Mongoose processor RAS and CAS timing. Simulated FPGA by writing test bench. Synthesized and programmed FPGA using BP Microsystems PLD programmer. Designed TMR circuit for allowing SEU protection of asynchronous circuitry, in a generally synchronous design. Interfaced with FPGA’s with built in State machines.
DESIGN ENGINEER, Optical Disc, Norwalk 11/00 – 08/00
Wrote ABEL HDL to address chip selects using 22V10s Designed serial communication hardware for Optical Transmission meter with Z80 microprocessor. Changed code inside EPROM, which had driver info for serial communication. Entered schematics using Orcad. Coordinated PCB design and fab with vendors and design house. Tested and Trouble shot board till design worked.
DESIGN ENGINEER, ECT, Pomona, 6/00 – 2/00
Conducted experiments to reduce Electrostatic Discharge. Worked with PCB designer to layout board. Verified gerber data, and coordinated PCB fabrication effort. Designed and built transmitter and receiver for differential cable. Used digital Oscilloscope and Logic analyzer to troubleshoot loaded board tester.
DESIGN ENGINEER Safetran, Rancho Cucamonga 11/99 – 4/98
Designed FPGA, Microprocessor MC68302, MC68332,&DSP, based hardware for TDMA type routing of T1 lines using Mentor Graphic’s Schematic Entry & ORCAD. One system used proprietary Operating System for 68302 for FLASH programming Via Serial Port on PC. Interconnected ROM, RAM, UARTs, and other devices using the FPGA to match timing delays and proper logic, Generated Memory Map of designs. Troubleshot prototypes and fixed problems. Researched databooks/internet and offered solutions for obsoleted part alternatives. Simulated digital systems on Xilinx Foundation software, Simulated analog circuits. Formatted hard drives and built computers, installed Window 95 and NT. Installed Drivers for touch screen monitors. Wire wrapped and bread boarded multiple output switching power supply prototype. Built PIC based TEST FIXTURE for testing multiple parameters.
Digital/Software Engineer, Ortel, Alhambra, CA 3/98 – 11/96
Used VHDL to implement multiple input multiplexor gates, and basic logic devices on Lattice Semiconductor ISP CPLDs. Modified existing CPLD architecture for logical operations such as Memory Mapping & I/O routing, using ORCAD schematic capture. Worked with embedded Systems for monitoring circuitry on Fiber optic Transmitter. Wrote segments of C Program for M68HC11 to monitor A/D values and set acceptance parameters for captured data. Debugged Assembly Code for communications protocol with the use of the Nohau In Circuit Emulator. The system made use of RS232 & RS485 for monitoring LASER characteristics of Fiber optic Transmitter and Receiver using a Visual Basic Program. Implemented state machine checking communication packet characteristics.
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